Interrupts

An interrupt is a signal from a device that makes the CPU pause its execution and cater to the interrupts needs, after which the CPU carries on with whatever it was doing.

Based on source

Hardware interrupts

External or I/O interrupts

  • Triggered by I/O externally.
  • Usually acknowledgements, ready statuses, errors.

Internal interrupts or Exceptions

  • An exception triggered by an error.
  • Like a divide by zero exception.

Software interrupts

These are generated by the programmer using the INT instruction. Software interrupts are triggered using what are called syscalls. Syscalls are also called monitor calls.

Based on type

One way to implement interrupts would be to call a generic routine that examines the state of the interrupt and then calls the necessary interrupt service routine. But since interrupts need to be handled fairly quickly, there is a predefined table of pointer to ISRs. This table/array is called the interrupt vector.

  • Vector table contains locations of the ISRs.
  • Priority tells the processor when to execute the ISR.
  • All interrupts are assigned 0 priority by default except for non maskable interrupts (NMIs) or also called system management interrupts (SMIs). They have priority set to -1.

Vectored interrupts

During a vectored interrupt, the device making the interrupt sends a special code to the processor, usually the ISR address. This special code is looked up in the interrupt vector (array)

  1. Interrupt occurs
  2. Device sends a special code (Request and ACK sent by CPU)
  3. Use vector to locate ISR from a pre defined table
  4. Execute ISR
  5. Return to normal execution

When an interrupt is recieved on the interrupt request line, it is processed. The interrupt saves the current state before it modifies and returns the state as it was at the end of execution.

Prioritized interrupts

The processor itself has a priority. When an ISR is being executed, the processor sets its priority to the device's priority and only accepts interrupts from higher priority than it first.

Polling

There is a common branch address for all interrupts. This service checks all interrupt sources and determines highest priority

Daisy chaining

All interrupt sources are attached in a serial manner in order of their priorities, and each source has its own vector. An interrupt is triggered when the interrupt request line goes LOW.
daisy_chaining_interrupts.png

  • Each device has a PO and PI (priority out and in)
  • PO is active high. PI is given by the CPU to ack an interrupt.
  • The PO of one device is connected to the PI of the next lower priority device.
    • PI = 1, PO = 1 means interrupt not requested but CPU acked an interrupt. Signal is passed on to the next device.
    • PI = 1, PO = 0 means device did request an interrupt. So it places its VAD(vector address) onto the bus. All lower priority device have signal blocked as PO = 0.
    • PI = 0 then PO = 0 to tell other devices that ack signal has been blocked.
  • After the interrupt, the request line is set to HIGH again.

Based on importance

Maskable interrupt

A maskable interrupt is one that can be ignored or disabled by the CPU by changing some control bit. These are used by I/O devices, or communication requests

Non maskable interrupt

NMIs can not be ignored by the CPU and are of high priority. They are reserved for critical or emergency conditions which require immediate attention. They are used for hardware or power failures.